Investigation on floating-gate field-effect transistor for logic-in-memory application

In this paper, we present analysis results on the applicability of a previously introduced memory device, floating-gate field-effect transistor (FGFET), to a logic-in-memory (LiM) system for the first time. Device optimization and compact modeling were performed using a well-calibrated technology computer-aided design model and the results of applying LiM circuits were arranged. Device optimization in the 32 nm technology node was conducted by assessing the device performance in terms of memory window, retention time, and write speed. After device optimization, the operational characteristics were analyzed by applying the proposed compact model to a full adder (FA) circuit and a ternary content addressable memory (TCAM) circuit with LiM characteristics. Compared to FA and TCAM circuits composed of conventional FETs, the FGFET-based circuits demonstrated superior performance in terms of area and operating characteristics, implying that they offer significant potential for applications in silicon-based LiM technology.