Noise figure improvement by controlling wiring effects in RF low noise amplifiers

In this letter, we evaluate the noise figure (NF) improvement that results from controlling the parasitic gate resistance of a radio-frequency (RF) low noise amplifier (LNA). By optimizing the number of gate contacts and wiring modifications in our fabricated device, the customized layout exhibited an approximately 25% reduction in the gate electrode resistance (R_elect) when compared to a reference device provided by the foundry. The fabricated LNA, which used a customized layout in a 0.18 μm standard CMOS process, improved the NF by almost 6% without affecting the Si area and DC power consumption, and exhibited a NF of 2.57 dB, gain of 11.6 dB, DC power dissipation of 4.0 mW, and return loss at both the input and output of more than 10 dB.