Nonlinear design of a low-phase-noise oscillator based on load-line analysis

A novel approach to the design of a low-phase-noise oscillator is presented, which is enable to optimize the phase noise and the oscillation power simultaneously. Through a load-line analysis of a transistor without feedback, the oscillation power and the baseband (1/f) noise investigated and predicted. In the implementation of an embedding up-conversion factor are investigated and predicted. In the implementation of an embedding feedback network, generalized formulas considering the quality factors of the embedding feedback elements are newly introduced. The proposed approach is applied to the design of an engineering model voltage-controlled oscillator (VCO)for a satellite transponder. The phase-noise characteristics of the manufactured VCO exhibit - 114 dBc/Hz at 10-kHz offset and - 133-dBc/Hz at 100-kHz offset at 1748 MHz.