Abstract
Recent progress in the research of ferroelectric-gate FETs is reviewed mainly from a view-point of the data retention characteristics. First, importance of insulator-inserted gate structures such as an MFIS (M; metal, F; ferroelectric, I; insulator, S; semiconductor) or MFMIS structure is described and the necessary conditions for the insulating buffer layer and the ferroelectric film are discussed. Then, experimental results for the SiO2 and high-k dielectric buffer layers combined with such ferroelectric films as SBT (SrBi2Ta2O9) and BLT ((Bi,La)4Ti3O12) are presented, in which particular attention is paid to the discussion on the induced charge matching between the buffer layer and the ferroelectric film. As an example, it is shown in a Pt/BLT/LaAlO3/Si diode that the high and low capacitance values written by positive and negative pulses can be retained at least for 3 days. Finally, recent experimental results on the data retention characteristics of the ferroelectric-gate FETs are presented.
| Original language | English |
|---|---|
| Pages (from-to) | 297-304 |
| Number of pages | 8 |
| Journal | Materials Research Society Symposium - Proceedings |
| Volume | 748 |
| State | Published - 2003 |
| Event | Ferroelectric Thin Films XI - Boston, MA, United States Duration: 2 Dec 2002 → 5 Dec 2002 |