Signal detector for 6-Gbps 55-nm CMOS serial ATA receiver

A signal detector which incorporates differential amplifiers, an RC filter, and a Schmitt trigger is designed for a 6-Gbps 55-nm CMOS SATA receiver. The differential amplifier with the increased gain and commonmode rejection ratio (CMRR) enables the signal detector to have a thresholdvoltage range between 110mV and 165mV over all the PVT variations, which is 26.7% reduced comparing with the conventional circuit. The signal detector also has a small random threshold variation of ±11.1mV (±3σ). The proposed signal detector is designed and verified using a 55-nm CMOS technology.