Silicon-on-insulator (SOI) integration for organic field effect transistor (OFET) based circuits

Recep Özgün, Byung J. Jung, Bal M. Dhar, Howard E. Katz, Andreas G. Andreou

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Scopus citations

Abstract

In this paper, we report the first silicon-on-insulator (SOI) integration technique for organic field effect transistor (OFET) based circuits. Proposed design flow relies on only basic micro-fabrication processes such as photolithography and physical vapor deposition. This novel fabrication technique allows patterning of conductive silicon gate islands on the subtrate and eases the via and interconnect patterning and deposition for a bottom-gate OFET configuration. We fabricated p- and n-type transistors, and proof of concept OFET-based complementary circuits such as inverter and NAND-gate. Fabricated CMOS inverters have full rail-to-rail swing, very high gain (up to 58.3 at 60V, and 18.1 at 20V supply voltages), and outstanding noise margins of around 21V symmetric for NMHIGH and NMLOW at 60V supply voltage.

Original languageEnglish
Title of host publication2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
Pages2253-2256
Number of pages4
DOIs
StatePublished - 2011
Event2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011 - Rio de Janeiro, Brazil
Duration: 15 May 201118 May 2011

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011
Country/TerritoryBrazil
CityRio de Janeiro
Period15/05/1118/05/11

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