Single-crystalline Si STacked ARray (STAR) NAND flash memory

Jang Gn Yun, Garam Kim, Joung Eob Lee, Yoon Kim, Won Bo Shim, Jong Ho Lee, Hyungcheol Shin, Jong Duk Lee, Byung Gook Park

Research output: Contribution to journalArticlepeer-review

32 Scopus citations


In this paper, a 3-D nand Flash memory array having multiple single-crystal Si nanowires is investigated. Device structure and fabrication process are described including the electrical isolation of stacked nanowires. Numerical simulation results focused on nand Flash memory operation are delivered. Devices and array with stacked bit lines are fabricated, and memory characteristics such as program/erase select gate operation are measured. Array scheme is also discussed for the high-density bit-cost scalable 3-D stacked bit-line nand Flash memory application.

Original languageEnglish
Article number5729801
Pages (from-to)1006-1014
Number of pages9
JournalIEEE Transactions on Electron Devices
Issue number4
StatePublished - Apr 2011


  • Damascene gate process
  • layer replacement and single-crystal Si nanowire
  • nand Flash memory
  • stacked bit lines
  • three-dimensional (3-D) memory


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