Abstract
Nanocrystalline silicon (nc-Si) films were synthesized by catalytic chemical vapor deposition at a low substrate temperature (100 °C) for use as an active layer in bottom-gate thin-film transistors. The hydrogen-dilution technique was employed to increase the crystalline volume fraction of the synthesized films. The incubation layer thickness was estimated to be 5.1 nm for a hydrogendilution ratio, RH (= [H2]/[SiH4]), of 54. When RH was increased from 64 to 74, the deposition rate decreased from 20 to 0.5 nm/min. In order to achieve a high deposition rate and high crystallinity near the interface region, we modulated RH through the film thickness. We also fabricated metal-insulator-semiconductor-insulator- semiconductor diodes from multilayer structures consisting of an nc-Si layer sandwiched between two silicon nitride layers. By analyzing the capacitance-voltage characteristics of these diodes, we found that the hysteresis and rectifying behavior of these diodes were affected by the the nc-Si layer thickness.
Original language | English |
---|---|
Pages (from-to) | 7519-7523 |
Number of pages | 5 |
Journal | Journal of Nanoscience and Nanotechnology |
Volume | 13 |
Issue number | 11 |
DOIs | |
State | Published - Nov 2013 |
Keywords
- Catalytic CVD
- Low temperature process
- Nanocrystalline silicon
- Thin film transistor