Studying the Variation Effects of Radiation Hardened Quatro SRAM Bit-Cell

Quatro is one of promising SRAM bit-cells for severe radiation environment such as space. However, our study shows that under process and temperature variations of 65nm CMOS, Quatro suffers from high write failure probability, impeding the application of this SRAM bit-cell. We explore the possibility of several popular techniques, such as boosted word-line voltage and negative or boosted bit-line biasing, to improve the write stability of Quatro. We observe that this SRAM bit-cell has different write mechanism from that of the 6T SRAM. Hence, the negative bit-line biasing does not make significant achievement, unlike the 6T SRAM. In this work, we employ the boosting of both word-line and bit-line. By applying 100 mV raised voltage, we obtain robust write operations up to 250 MHz frequency.