Abstract
This letter describes 3-D NAND flash memory architecture having four-level stacked single-crystalline silicon nanowire channels. Previously, we designed 3-D NAND flash memory architecture based on single-crystalline channel stacked array (CSTAR). In this letter, CSTAR NAND flash memory is fabricated and its operations are verified. Successful memory operations of each stacked array of CSTAR including program/erase, retention, and endurance performances are demonstrated.
Original language | English |
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Article number | 6553062 |
Pages (from-to) | 990-992 |
Number of pages | 3 |
Journal | IEEE Electron Device Letters |
Volume | 34 |
Issue number | 8 |
DOIs | |
State | Published - 2013 |
Keywords
- 3-D NAND flash memory
- memory operation
- nanowire SONOS
- stacked array