Three-dimensional NAND flash memory based on single-crystalline channel stacked array

Yoon Kim; Myounggon Kang; Se Hwan Park; Byung Gook Park

doi:10.1109/LED.2013.2262174

Three-dimensional NAND flash memory based on single-crystalline channel stacked array

Yoon Kim
, Myounggon Kang
, Se Hwan Park
, Byung Gook Park

Seoul National University

Research output: Contribution to journal › Article › peer-review

33 Scopus citations

Abstract

This letter describes 3-D NAND flash memory architecture having four-level stacked single-crystalline silicon nanowire channels. Previously, we designed 3-D NAND flash memory architecture based on single-crystalline channel stacked array (CSTAR). In this letter, CSTAR NAND flash memory is fabricated and its operations are verified. Successful memory operations of each stacked array of CSTAR including program/erase, retention, and endurance performances are demonstrated.

Original language	English
Article number	6553062
Pages (from-to)	990-992
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	34
Issue number	8
DOIs	https://doi.org/10.1109/LED.2013.2262174
State	Published - 2013

Keywords

3-D NAND flash memory
memory operation
nanowire SONOS
stacked array

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10.1109/LED.2013.2262174

Cite this

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abstract = "This letter describes 3-D NAND flash memory architecture having four-level stacked single-crystalline silicon nanowire channels. Previously, we designed 3-D NAND flash memory architecture based on single-crystalline channel stacked array (CSTAR). In this letter, CSTAR NAND flash memory is fabricated and its operations are verified. Successful memory operations of each stacked array of CSTAR including program/erase, retention, and endurance performances are demonstrated.",

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KW - memory operation

KW - nanowire SONOS

KW - stacked array

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Three-dimensional NAND flash memory based on single-crystalline channel stacked array

Abstract

Keywords

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