VLSI design and FPGA implementation of state-of-charge and state-of-health estimation for electric vehicle battery management systems

State of charge (SOC) and state of health (SOH) estimation is an important function in electric-vehicle (EV) battery-management systems (BMSs). SOC and SOH are the principal parameters for judging a battery's state and critical for ensuring its safety and performance. In a conventional EV BMS, SOC and SOH estimation is performed on the master. However, owing to the increasing number of battery cells and computational cost of estimation algorithms, hardware-oriented processing for each single-battery module on the slave is being researched to reduce the master's burden. Accordingly, this paper describes the hardware-optimized algorithm, VLSI design, and field-programmable gate array (FPGA) implementation verification results of an application-specific integrated circuit in a slave module to estimate SOC and SOH for multiple cells. We introduce an SOC and SOH estimation algorithm with 70% complexity reduction within a 2% error margin based on each cell's voltage, current, and temperature and design a hardware block and logic circuit to implement the algorithm. An FPGA was utilized to verify the designed logic circuit, revealing a performance time of 0.65μs at 100 MHz. Finally, an FPGA testbed connected to a real battery and analog-front-end board was built to check the real-time performance through a graphical user interface.